Prospect of SiC Power Module Packaging Technology

Traditional material processes based on welding and wire bonding have unsolvable problems such as low melting point, high temperature creep failure, wire winding, parasitic parameters, etc. New interconnect materials are developing from welding to crimping and sintering technology.

Compared with soldered power modules, the advantages of press-fit modules are as follows.

(1) Welding connects the chip and the PCB board through the lead wire, which is easy to age and fall off after multiple power cycles, causing the module to fail. Also, voids in the solder layer increase thermal resistance and reduce reliability. Crimping uses pressure to press the chip on the substrate, and the current flows directly from the copper plate to improve reliability.

(2) The traditional welding type is mostly single-sided heat dissipation, while the crimping type is mostly double-sided heat dissipation, which can improve the heat dissipation performance and benefit the full play of device performance.

(3) The bonding wire and soldering layer introduce stray parameters. Under high-frequency characteristics, the voltage and current tend to fluctuate greatly, which affects the series characteristics of the chip.

Considering that nano-silver solder paste has high electrical conductivity, high thermal conductivity, and excellent ductility, and its melting point is significantly higher than that of traditional solder, the relevant scientific research team used nano-silver solder paste to sinter the chip and the molybdenum layer of the collector, and successfully developed Silver sintered crimp packaged devices show that it has certain advantages in the package application of crimped power modules.

Silver sintered packaging can reduce the turn-on voltage and on-state loss of crimp-type devices, slow down the contact wear between the chip and the emitter molybdenum layer, and improve the service life of the device.

At present, there are still problems that cannot be ignored in the development of sintering packaging technology. At the same time, some feasible solutions are proposed as follows.

(1) Due to the problems caused by the different thermal expansion coefficients of the silver and SiC chip backside materials, the interconnection performance can be improved by adding a metal buffer layer, but it will increase the complexity and cost of the power module packaging process. It is a feasible solution for research and development to replace the buffer layer with a sintered layer that meets the performance index and reliability.

(2) The electromigration phenomenon of the silver layer is not conducive to the long-term reliable application of power electronic devices. Copper sintering can satisfy both electromigration reduction and cost reduction, making it a promising alternative for high-temperature die-attach materials.

(3) Optimize the sintering industry, innovate sintering schemes, reduce preheating and sintering time, and improve production efficiency; assembly line work improves manufacturability and flexibility of production design.

(4) Compared with pressureless sintering, low pressure sintering has better reliability and heat dissipation performance. Although some manufacturers have solved the pressure problem, the problems of compactness during sintering, temperature control of the connection layer and performance degradation in extreme environments have yet to be resolved.

The solution to the above problems requires the linkage and coordination of the upstream and downstream of the industrial chain to tackle key problems, and some problems will be gradually solved with technological progress. Although the current module packaging is almost all based on wire bonding, it is expected that silver sintered packaging technology will become the mainstream technology for power module interconnection in the next 3 to 5 years. Due to the negative impact of silver ion migration on the interconnect structure, coupled with cost and thermal stress adaptation requirements, similar to silver sintering technology, transient liquid phase sintering (TLPS), silver-copper sintering, copper sintering technology and corresponding solder paste materials are also rapidly Development, some technical bottlenecks are expected to break through in recent years. Chip mounting, substrate connection, module and heat sink connection, etc. are all potential applications of sintering technology.

Ultrasonic spraying technology is used for semiconductor photoresist coating. Compared with traditional coating processes such as spin coating and dip coating, it has the advantages of high uniformity, good encapsulation of microstructures, and controllable coating area. In the past 10 years, it has been fully demonstrated that the 3D microstructure surface photoresist coating using ultrasonic spraying technology, the prepared photoresist coating is significantly higher than the traditional spin coating in terms of microstructure wrapping and uniformity Craft.

The ultrasonic spraying system can precisely control the flow rate, coating speed and deposition volume. Low-speed spray shaping defines atomized spray as a precise and controllable pattern to avoid excessive spray when producing a very thin and uniform layer. The ultrasonic spray system can control the thickness from sub-micron to more than 100 microns, and can coat any shape or size.

Prospect of SiC Power Module Packaging Technology - Cheersonic

About Cheersonic

Cheersonic is the leading developer and manufacturer of ultrasonic coating systems for applying precise, thin film coatings to protect, strengthen or smooth surfaces on parts and components for the microelectronics/electronics, alternative energy, medical and industrial markets, including specialized glass applications in construction and automotive.

Our coating solutions are environmentally-friendly, efficient and highly reliable, and enable dramatic reductions in overspray, savings in raw material, water and energy usage and provide improved process repeatability, transfer efficiency, high uniformity and reduced emissions.

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