Where Will the AI ​​Chip Go?

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Although there are many difficulties, artificial intelligence is the general trend, and AI chips are also an inevitable demand. For relevant practitioners, what needs to be considered is where the future AI chips will go.

For this problem, this largely depends on the evolution of AI algorithms. At present, two algorithm architectures, CNN and transformer, coexist. From the hardware point of view, these are two types of operations. The former is a convolution operation, and the latter is a matrix multiplication, which has different requirements for hardware design.

When dealing with convolution operations, dedicated hardware has room to play, or there is an opportunity for innovation; but when dealing with matrix multiplication, it is unknown whether dedicated hardware must be used, because general-purpose processors are mature enough for such operations.

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At the same time, in the data center (IDC) market, the GPU architecture is already the de facto standard, and other architectures are difficult to shake, especially dedicated hardware basically has no chance in the field of cloud computing. In the end-side market, if the transformer eventually wins, it is not ruled out that there will be a chip that directly hardwareizes the algorithm, which is also consistent with the concept of DSA (domain specific accelerator) that we have proposed in recent years.

In recent years, the hot concept of in-memory computing has opportunities in the AI ​​market. In recent years, the relatively hot in-memory computing and neuromorphic processing can be classified in the field of analog computing. Among them, in-memory computing first appeared in the AI ​​field for three reasons: first, the memory access problem, that is, the storage wall problem; second, the quantization accuracy has entered the int8 era; third, the essence of AI is approximate computing. The three are the conditions for the emergence of in-memory computing in the AI ​​field.

However, there is a problem here that the software development environment that is integrated with analog computing is not mature. In other words, although the hardware is analog computing or non-Von Neumann architecture, the software is forced to be compatible with the Fung architecture, otherwise Developers can not use, in fact, this is a very serious problem. To put it more generally, analog computing such as in-memory computing or neuromorphic computing should have its own software development process and methodology, but it is not yet, and it is not clear when it will be available.

In this transition period, the advantages of analog computing or in-memory computing are relatively limited. One of the evidences is that there are a large number of ADC/DAC in such chips for digital-to-analog conversion. But the impact of these ADCs/DACs on the overall indicators of the chip is obvious.

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